Friday, January 23, 2009

Freescale forums save me again

When I started the long bootstrapping process (that I'm still deeply mired in) I initially had trouble getting my breadboarded 908QB8 to talk to the serial port. (These parts have a bulit-in ROM monitor that bitbangs a serial protocol on a port pin.) After a day or so of going crazy, I found this thread on the 8-bit forum about the 908 parts requiring a really clean power-on reset (POR). Vdd needs to go to within a few tens of millivolts of ground before it comes back up.

I measured Vdd with the power disconnected from my breadboard, and, sure enough, it was stuck at 2v or so. The (cheap) voltmeter I used to measure this quickly discharged the on-board capacitors, and I got a good POR that way, and was able to get into the ROM monitor and talk to the chip.

By adding, between Vdd and Vss, a reversed-biased diode in series with a small resistance, I was able to get reliable resets. I would never had figured this out without the forum.

I've run into trouble in the second stage of my bootstrap as well: getting the 908QB8 to act as a background debug mode (BDM) host, talking to an S08QG8. I can measure BDM SYNC pulses with some measure of reliability and repeatability, but I can't seem to get anything out of the background debug controller (BDC) on the S08.

Last night, while perusing the 8-bit forum for more posts about "trouble" with the DEMO boards' built-in BDM interfaces, I stumbled across a link to my answer. It turns out that blank S08QG chips have to be powered up into active background mode, by holding the BKGD/MS (MS means "mode select") pin LOW during POR. I'm doing nothing of the kind. I plug a cable into a 4-pin header on the breadboard, and everything powers up at the same time. The 908 comes up fine every time, but apparently the S08QG (and other low-pin-count devices that lack a dedicated RESET pin) are a bit hard to get reliably into BDM when they are blank. They power up and start executing random code - unprogrammed Flash, peripheral registers - and continually either experience COP (computer operating properly - ie, watchdog) resets or illegal instruction resets. There isn't a long enough window between resets to get the device into active BDM mode - the protocol takes long enough that it's basically not possible.

So I need to fashion a way to power cycle the S08 from the 908. Initially I'm going to jumper it by hand, just to make sure this works.

Another side effect of powering up an S08QG in active BDM, is that its BDC operates from a 4Mhz clock (the bus clock) rather than the dedicated "alternate BDC clock", which is 8MHz out of reset. My 908 is running at 3.2MHz, and I figured out that bitbanging BKGD would be too slow, if the target is running at 8Mhz. So I dug up a 25Mhz crystal and fashioned an oscillator, so I could run my 908 at 6.25Mhz (bus clock).

Now I can go back to a simple setup, since my 3.2Mhz 908 is going to be plenty fast to talk to a 4Mhz S08.

Sorry about all the acronyms!

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